Work Location: Greater Noida The position is an exciting opportunity to be part of a flexible and dynamic team in the growing markets of mixed signal chips with signal processing IPs, ARM processor and AMBA bus interface like Wireless Chargers, Bluetooth, PMIC etc. used in Mobile, Tablets, Microcontrollers etc. The role works within the digital verification team in Greater Noida collaborating with the design and verification teams in Italy and Singapore creating SV UVM based verification environment, using various apps of JasperGold to ensure design quality and qualify the testbench using Certitude. Job scope: Work on IP verification or SOC verification. Verification planning using v-plan, functional points identification, and review. SV UVM based test-bench development. Implementation using different verification techniques (constraint random dynamics simulation and static formal verification). Verification closure by ensuring 100% code and functional coverage. Schedule preparation a

We're immediately hiring for Verification EngineerRole: Verification EngineerLocation: HyderabadExperience: 2-4 yearsJob description:- BS/MS in ECE with 2-4 years of experience in FPGA IP's/System/Co-simulations- Proficiency in Verilog, System Verilog, C and any scripting language (tcl/perl/python)- Experience in High speed bus interfaces (PCIe/Ethernet/USB) and high bandwidth memory Verification- Experience in Xilinx Vivado based system/Co-simulation flows- AMBA AXI, PCIe protocol and Cache expertise is a plus- Good documentation and presentation skills- Good communication (Verbal and written) and teamwork skillsAbout Company:Infometry Inc is a pure play Business intelligence company, located in Bay Area( Fremont, CA). Also, have offshore locations in Bangalore and Singapore. We are leading Data Analytics company, Certified Engineering, Implementation partner for Informatica, Tableau, Snowflake, Matillion, Talend, Google Cloud (GCP), Dell Boomi, Adaptive Insights, CallidusCloud

We're immediately hiring for Validation EngineerRole: Validation EngineerLocation: HyderabadExperience: 2-4 yearsJob description:- BS/MS in ECE with 2-4 years of experience in FPGA/Silicon Validation- Proficiency in C, Verilog and any scripting language (tcl/perl/python)- Experience in High speed bus interfaces (PCIe/Ethernet/USB) and high bandwidth memory Validation- Experience in Xilinx Vivado/ISE tool knowledge and understanding of timing and implementation reports- Debug expertise with Xilinx Chipscope (ILA) and protocol analyzers (Lecroy)- AMBA AXI, PCIe bus protocol and Cache expertise is a plus- Good documentation and presentation skills- Good communication (Verbal and written) and teamwork skillsAbout Company:Infometry Inc is a pure play Business intelligence company, located in Bay Area( Fremont, CA). Also, have offshore locations in Bangalore and Singapore. We are leading Data Analytics company, Certified Engineering, Implementation partner for Informatica, Tableau, Snow

Dear Applicant, This position Software Engineer II is for one of the World's leading developer of Electronic Design Automation (EDA) Products & Services And Is a Fortune 100 organisation. The Place Of Posting is for its Ahmedabad, Gujarat location. Minimum Experience level: 2+ years Education: BE/ B.Tech/ ME / M.Tech / MS Electronics and communications. Requirements: - B.E./B.Tech./M.E./M.Tech. degree with relevant 3+ years of experience. - Good working knowledge of various verification concepts such as Verification architecture, coverage, checkers, test plan etc. - Strong in building Verification environments based on UVM, System Verilog - Strong analytical and problem-solving skills with an ability to visualize processes and outcomes. - Outstanding all-round communication skills and ability to work collaboratively in a dynamic multi-location environment. Strong Plus: - Domain expertise in AMBA Protocol knowledge - Programming skills: C, C+ Note - The Client prefers local candidat

Responsibilities br&gtbr&gt Understand Standard Specifications the functional specifications feature enhancements for the product and create microarchitecture and detailed design documents for some of the components of the design with medium complexity.br&gtbr&gt Be an individual contributor in the Design Tasks RTL coding of design, debug, verification coverage improvement in the directed Verilog Test Bench, etc.br&gtbr&gt Create work on designs using Low Power Design Methodology and automotive safetybr&gtbr&gt May need to understand Standard Specifications the functional specifications feature enhancements for the product and create microarchitecture and detailed design documents for some of the components of small complexity functions product features for the DesignWare family of synthesizable cores in protocol areas such as AMBA \(AMBA2, AXI, CHI\) SDeMMCDDRPCIeEthernet USB MIPIbr&gtbr&gt Creates deliverables which do not require close review

Job ProfileCompany:Qualcomm India Private LimitedJob Area:Engineering Group, Engineering Group > Hardware EngineeringJob Overview:Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. IT takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.Job Description:8 to years of work experience in ASIC/SoC DesignExperience in Logic design /micro-architecture / RTL coding is a mustMust have hands on experience with SoC design and integration for complex SoCsExperience in Verilog/System-Verilog is a must.Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCCUnderstanding of Memory controller designs and m

Worked on SoC/IP level testbench and verification Hands-on with SV and Assertion-based verification methodology. At least 2 years of experience on HVL (SV, Verilog, Specman, E, VMM, OVM, UVM) Worked on AMBA, USB, DDR, PCIE, ethernet Call 9870322453 The original job offer can be found in Kit Job: www.kitjob.in/job/21143015/tek446-soc-verification-engineer-noida/

Job Description The position is an exciting opportunity to be part of a flexible and dynamic team in the growing markets of mixed signal chips with signal processing IPs, ARM processor and AMBA bus interface like Wireless Chargers, Bluetooth, PMIC etc. used in Mobile, Tablets, Microcontrollers etc. The role works within the digital verification team in Greater Noida collaborating with the design and verification teams in Italy and Singapore creating SV UVM based verification environment, using various apps of JasperGold to ensure design quality and qualify the testbench using Certitude. Job scope: Work on IP verification or SOC verification. Verification planning using v-plan, functional points identification, and review. SV UVM based test-bench development. Implementation using different verification techniques (constraint random dynamics simulation and static formal verification). Verification closure by ensuring 100 PERCENT code and functional coverage. Schedule preparation and exec

Responsibilities:- Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of the design with medium complexity.- Be an individual contributor in the Design Tasks - RTL coding of design, debug, verification coverage improvement in the directed Verilog Test Bench, etc.- Create/ work on designs using Low Power Design Methodology and automotive safety- May need to understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of small complexity functions/ product features for the DesignWare family of synthesizable cores in protocol areas such as AMBA (AMBA2, AXI, CHI)/ SD/eMMC/DDR/PCIe/Ethernet/ USB/ MIPI- Creates deliverables which do not require close review or supervision by a Senior Technical Lead.- May learn to do technical

Job Requirements BTechBEBSMS with greater than 3 years of experience Must have very good C and System VerilogUVM knowledge with prior work experience on live projects Experience in verification planning of complex SoC and developing test bench architecture Expertise in AMBA bus protocols and ARM CPU Expertise with NoC, DDR and Ethernet Experience with Cache Coherency Experience in developing functional verification environments including the components like monitors, checkers, scoreboards, assertions and coverage monitors GLS Experience Scripting knowledge \(Perlshell\) Must have good debugging and problemsolving skills Should be able to collate requirements from the customers, coordinate with offshore teams and ensure completion with quality Should be able to review and sign off on deliverables from team membersRequired Skills \: English

Job Description EducationBE/B.Tech./MS/M.Tech. Electronics or Electronics & CommunicationCore Competencies:Worked on SoC level testbench and verification environmentTestbench architecture, coding and good understanding of design issues in RTLTestbench generation, testvector creation, simulations, gate level simulationsHands on with System Verilog and Assertion based verification methodologyAtleast 4years of experience on HVL System Verilog, Vera, Specman, E, VMM, OVM, UVMShould be able to work independently and able to guide other team membersProblem solving capabilities with leadership qualitiesShould have managed a team of 10 or more engineersSimulation Tools:NCSIM/VCS/ModelSim/QuestaAdded Advantage:Knowledge of RTL coding stylesLow power verification UPF/CPF would be an added plusExperience on System C would be an added plusWorked on protocols like AMBA AHB/AXI, MIPI, PCI Express, SATA, USBsend your resume to careerstruechip.net and mention position/location in the subject. Job Func

Job Descriptionbr&gtbr&gt You will be responsible for IP subsystem level microarchitecture development and RTL coding.br&gtbr&gt Prepare blocksubsystem level timing constraints.br&gtbr&gt Integrate IPsubsystem.br&gtbr&gt Perform basic verification either in IP Verification environment or FPGA.br&gtbr&gtDesired Skills and Experiencebr&gtbr&gt B. Tech. or M. Tech. with 4 to 8 years of experience.br&gtbr&gt Experience in Logic design microarchitecture RTL coding is a must.br&gtbr&gt Expertise in Verilog is a must.br&gtbr&gt Should have knowledge of AMBA protocols AXI, AHB, APB.br&gtbr&gt Experience in Synthesis Understanding of timing concepts for ASIC or experience in Xilinx FPGA Design Implementation is required.br&gtbr&gt Experience in design of DDR USB PCIe controller or such complex protocols is a plus.br&gtbr&gt Hands on experience in Multi Clock designs, Asynchronous interface is a must

Experienced in ASIC RTL design Experience in managing & leading design teams for over 5 years Proven hands-on experience with SOC Design and IPs design Knowledge and experience with complex SoC designs based on ARM/ARC and hierarchical interconnect. Expertise in verilog and system verilog based logic design Create detailed micro architecture & implement complex IP or sub-system Work with DV team to debug and meet code coverage metrics Work with FW team and provide required support on FW development Experience in all design tools/standards/simulators like Lint, CDC, DC, VCS & UPF Knowledge of interconnect protocols like AMBA is a must Work with FW team and provide required support on FW development BS / MS in Electrical Engineering or equivalent. Work Experience 12 years Added Qualifications Candidate should have experience to handle and guide teams on End-to-End SOC development cycle like Design, Verification, DFT, Physical design, FPA prototyping, FW bring up, Characterization, Test

Job Requirements:- BTech/BE/BS/MS with greater than 3 years of experience- Must have very good C and System Verilog/UVM knowledge with prior work experience on live projects- Experience in verification planning of complex SoC and developing test bench architecture- Expertise in AMBA bus protocols and ARM CPU- Expertise with NoC, DDR and Ethernet- Experience with Cache Coherency- Experience in developing functional verification environments including the components like monitors, checkers, scoreboards, assertions and coverage monitors- GLS Experience- Scripting knowledge (Perl/shell)- Must have good debugging and problem-solving skills- Should be able to collate requirements from the customers, co-ordinate with offshore teams and ensure completion with quality- Should be able to review and sign off on deliverables from team members (ref:hirist.com)

Microns vision is to transform how the world uses information to enrich life for all. Join an inclusive team focused on one thing using our expertise in the relentless pursuit of innovation for customers and partners. The solutions we create help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. Req. ID 243462 Job Description Hands-on experience in RTL design(Verilog), verification, SoC design/integration flow and design automation. Strong coding skills in Perl, tcl or other industrial standard scripting languages. Strong knowledge about Pipelining, SoC reset and clock handling. UPF and low power flow Strong knowledge about ASIC tool like DC, PrimeTime, CDC/RDC and LINT. Understanding timing, synthesis, DFT and power analysis using PTPX is big plus. Familiar with SoC fabric like AMBA

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