Conduct physical site surveys using a variety of equipment and tools - Prepare sketches/notes and perform electronic data collection including photos on mobile phone for data management - Verify the accuracy of survey data, including measurements and calculations conducted at survey site - Adhere to all COVID19 safety requirements and Electrical PPE regulations as per HSE standards - Surveyor shall visit the Public Lights poles across the given area and do the assessment using a Mobile App or tablet for the light pole survey work - 100% Field job - ITI/Diploma in Electrical is must - Freshers can apply - Walkin on 05.02.2021/06.02.2021/07.02.2021 at 16/34, V.E.S Convent School Road Garvebhavipalya Bangalore 560068 Land Mark- Amba Bajaj Showroom Job Type: Full-time Salary: ₹12,000.00 - ₹14,000.00 per month Schedule: - Morning shift The original job offer can be found in Kit Job: www.kitjob.in/job/21065330/l607-surveyor-bangalore-rural/

Conduct physical site surveys using a variety of equipment and tools - Prepare sketches/notes and perform electronic data collection including photos on mobile phone for data management - Verify the accuracy of survey data, including measurements and calculations conducted at survey site - Adhere to all COVID19 safety requirements and Electrical PPE regulations as per HSE standards - Surveyor shall visit the Public Lights poles across the given area and do the assessment using a Mobile App or tablet for the light pole survey work - 100% Field job - ITI/Diploma in Electrical is must - Freshers can apply - Walkin on 05.02.2021/06.02.2021/07.02.2021 at 16/34, V.E.S Convent School Road Garvebhavipalya Bangalore 560068 Land Mark- Amba Bajaj Showroom Job Type: Full-time Salary: ₹12,000.00 - ₹14,000.00 per month Schedule: - Morning shift The original job offer can be found in Kit Job: www.kitjob.in/job/21063307/l273-surveyor-bangalore-rural/

Looking for someone who is very strong technically and very good at multi-tasking as your role will involve leading 7 to 8 projects at one time. You will be responsible for leading and managing a team, client communication, and project execution. This role will include- Lead an internal IP Verification team, executing projects for an offshore client Be responsible for Test Planning, Environment Architecture and Project Management of Multiple Projects Guide team members in verifying IP's and delivering zero bug IP's Manage the team and their technical and leadership growth Manage all interactions with the client. - Experience in Design Verification Expert Knowledge in IP Verification Very strong knowledge in multiple protocols is highly desired, - AMBA protocols and at least one high speed interface - Must have expert knowledge in coverage driven test planning Must have expert knowledge in architecting configurable environments - Must have very strong System Verilog and UVM background M

Hiring SOC verification Experts.Position \: SOC verification Engineer.Work Location \: BangaloreExperience \: 5\-15 YearsSkills Required \:\- 5 years\- of experience in SOC/IP/Subsystem verification of multimillion Gate complex Design with multiple clocks/power domains.\-Experienc ein C and UVM/SV based Test environment, HDLs \(Verilog/VHDL\), simulators \(Synopsys/Cadence/Mentor\) is a MUST\- Understanding of the design/architecture and ability to debug RTL/Gate netlist is MUST\- Coverage driven Verification for addressing Functional, Performance requirement of the SoC, regression management\- Microcontroller architecture, ARM Cores, Interconnect\(NIC, FlexNoC\), Cache Coherency,\- Bus Protocols like AHB/AMBA,AXI, ACE Following skills will have additional value \:\- Memory controllers \(Flash, SRAM,DDR3/4/LPDDR\)\- Protocols like PCIe, MIPI, GPU \(Graphics processing\), VPU \(Video Processing\), Ethernet, USB,\- Formal verification methodologies and Apps, AVIP, PinMuxing Verification

Synopsys \- Bangalore, Karnataka \- will include but not be limited to USB, PCI Express, Ethernet, AMBA. Job role will have a combination of Test planning, Test environment coding both at unit level and system level, Test case coding and debugging, FC coding and analysis and meeting quality metric goals and regression management. Requirements\: \- BS/BE in EE with 2 years of relevant experience or MS with 1 years of relevant experience in the verification of IP cores and/or SOC verification.\-Experience in developing HVL based test.

This is a verification focused individual contributor’s role. The candidate will be part of the DesignWare IP Verification R&D; team at our Bangalore Design Center, India. Specify, design/architect and implement state-of-the-art Verification environments for the DesignWare family of synthesizable cores and perform Verification tasks for the IP cores. Work closely with RTL design team and be part of a global team of expert Verification Engineers. Domains will include but not be limited to USB, PCI Express, Ethernet, AMBA. Job role will have a combination of Test planning, Test environment coding both at unit level and system level, Test case coding and debugging, FC coding and analysis and meeting quality metric goals and regression management. Requirements: - BS/BE in EE with 2+ years of relevant experience or MS with 1+ years of relevant experience in the verification of IP cores and/or SOC verification. - Experience in developing HVL based test environments, developing and implementi

Job Description Knowledge of System Verilog, with UVM experience AMBA Bus Structures Embedded CPUS and C programming Protocol Knowledge of at least two of the following o AMBA Bus Interconnect o Ethernet o USB o SD/MMC o DDR/LPDDR Good organisation, teamwork, communication and interpersonal skills Great analytical and problem-solving skills and motivated to learn Strong time management skills, self-direction, and the desire to excel Education and Qualifications Honours Bachelor/Masters Degree in Electronic/Electrical/Computer Engineering, Science Engineering Degree What we offer? Our global team is growing, and we are looking for collaborative, creative team members to help us lead the industry transformation to build an adaptable intelligent world. Working in an environment encouraging you to grow your professional skills Working on next generation SOC devices containing multiple processor systems Opportunity to work on new technologies with domain world leaders Training and support t

Hiring SOC verification Experts.Position: SOC verification Engineer.Work Location: BangaloreExperience: 5-15 YearsSkills Required:- 5+ years- of experience in SOC/IP/Subsystem verification of multimillion Gate complex Design with multiple clocks/power domains. - Experienc ein C and UVM/SV based Test environment, HDLs (Verilog/VHDL), simulators (Synopsys/Cadence/Mentor) is a MUST- Understanding of the design/architecture and ability to debug RTL/Gate netlist is MUST- Coverage driven Verification for addressing Functional, Performance requirement of the SoC, regression management- Microcontroller architecture, ARM Cores, Interconnect(NIC, FlexNoC), Cache Coherency,- Bus Protocols like AHB/AMBA,AXI, ACE Following skills will have additional value:- Memory controllers (Flash, SRAM,DDR3/4/LPDDR)- Protocols like PCIe, MIPI, GPU (Graphics processing), VPU (Video Processing), Ethernet, USB,- Formal verification methodologies and Apps, AVIP, PinMuxing Verification, Randomization- Low

We have 06 new job roles for our client onsite deployment as below: Design Verification Engineer Exp: 3-8 Years Onsite: Singapore & Malaysia Onboard Location: Bangalore Candidates who can join in 0-60 days (Prefer Immediate Joiners) Skills Required: 3-8 years of relevant experience on IP / Sub-system verification on multimillion Gate and complex Design with multiple clocks with minimal supervision Hands on knowledge with strong fundamentals of SV/ UVM (and Verilog) and ability to modify or develop checkers, monitors etc. from scratch. (Must have) Desirable exposure to formal verification, assertions/SVA, functional coverage and regression management. Ability to debug Test bench and RTL issues and handle legacy Test bench and make enhancements. Highly desirable experience in IP with system interface protocols like AMBA /AHB or AXI. Must have experience in end to end IP verification project cycle, including Test bench Strategies, TB development, simulation debugs. Experience desirable on

Role \: Design Verification EngineerLocation \: South IrelandExperience \: 4 YearsNotice Period\: Immediate \- 30 DaysJD\:\-\- From India initially \- probably move to Eire \(South Ireland\) longer term\- SV UVM UVC \- block level\- Vplanning\- IP Verification \- Should have very good experience on SV and UVM, person should be able to create Test bench.Experience on IP / Sub\-system verification on multimillion Gate and complex Design with multiple clocks with minimal supervision.\- Hands\-on knowledge with strong fundamentals of SV/ UVM \(and Verilog\) and ability to modify or develop checkers, monitors etc. from scratch. \(Must have\) \- Desirable exposure to formal verification, assertions/SVA, functional coverage and regression management.\-Ability to debug Testbench and RTL issues and handle legacy Testbench and make enhancements.\-Highly desirable experience in IP with system interface protocols like AMBA /AHB or AXI.\-Must have experience in end to end IP verification project cy

This is a verification focused individual contributor-s role. The candidate will be part of the DesignWare IP Verification R&D team at our Bangalore Design Center, India. Specify, design/architect and implement state-of-the-art Verification environments for the DesignWare family of synthesizable cores and perform Verification tasks for the IP cores. Work closely with RTL design team and be part of a global team of expert Verification Engineers. Domains will include but not be limited to USB, PCI Express, Ethernet, AMBA. Job role will have a combination of Test planning, Test environment coding both at unit level and system level, Test case coding and debugging, FC coding and analysis and meeting quality metric goals and regression management. Requirements: BS/BE in EE with 6- years of relevant experience or MS with 4- years of relevant experience in the verification of IP cores and/or SOC verification. Must have experience in developing HVL System Verilog or Vera or Specman based test

180,000- 360,000 INR (PA) Full Time India Skills MARKETING MANAGER BUSINESS DEVELOPMENT SALES Experience 1 to 5 Years Industry Real Estate Functional Area Mktg / Advtg / MR / Media Planning / PR / Corp. Comm. -Should have good experience in Sales & Marketing. -Instilling a marketing led ethos throughout the business -Researching and reporting on external opportunities -Understanding current and potential customers -Managing the customer journey (customer relationship management) -Developing the marketing strategy and plan -Management of the marketing mix Company Location Amba Housing Industries(P) Ltd 570/95 Takripool tihara, Sector-H Kanpur Road, Lucknow, Website

We Have Excellent Opportunity with Our Service Based Organization Looking for Product Engineering Division. Looking for AMS Verification Professionals. Analog Mixed Signal Verification Strong in AMS Verification & modeling Preferred node,TSMC 7nm Exp:-4.0Yrs to 11.0Yrs Location:- HYD/Bang/Noida/Pune/Cochin. Strong understanding of SerDes, data Converters, clocking, power management and other AMS building blocks from analog & mixed-signal verification prospective Hands-on experience in building SPICE test benches at block, subsystem & full chip level Expertise in developing Mixed-Signal test benches, checkers and tests Hands-on experience in AMS modeling using real number, Wreal & verilog-AMS models Experience in UVM, SV & SVA based verification Experience with digital protocols (DDR, USB, PCIe, AMBA) is a plus Good scripting skills using Python, Perl, TCL & BASH is preferred Well experience in the usage of industry standard EDA tools like Virtuoso, AMS Designer/Xcelium, VCS- XA, Spect

We Have Excellent Opportunity with Our Service Based Organization Looking for Product Engineering Division. Looking for AMS Verification Professionals. Analog Mixed Signal Verification Strong in AMS Verification & modeling Preferred node,TSMC 7nm Exp:-4.0Yrs to 11.0Yrs Location:- HYD/Bang/Noida/Pune/Cochin. Strong understanding of SerDes, data Converters, clocking, power management and other AMS building blocks from analog & mixed-signal verification prospective Hands-on experience in building SPICE test benches at block, subsystem & full chip level Expertise in developing Mixed-Signal test benches, checkers and tests Hands-on experience in AMS modeling using real number, Wreal & verilog-AMS models Experience in UVM, SV & SVA based verification Experience with digital protocols (DDR, USB, PCIe, AMBA) is a plus Good scripting skills using Python, Perl, TCL & BASH is preferred Well experience in the usage of industry standard EDA tools like Virtuoso, AMS Designer/Xcelium, VCS- XA, Spect

This is a verification focused individual contributor’s role. The candidate will be part of the DesignWare IP Verification R&D; team at our Bangalore Design Center, India. Specify, design/architect and implement state-of-the-art Verification environments for the DesignWare family of synthesizable cores and perform Verification tasks for the IP cores. Work closely with RTL design team and be part of a global team of expert Verification Engineers. Domains will include but not be limited to USB, PCI Express, Ethernet, AMBA. Job role will have a combination of Test planning, Test environment coding both at unit level and system level, Test case coding and debugging, FC coding and analysis and meeting quality metric goals and regression management. Requirements: - BS/BE in EE with 6+ years of relevant experience or MS with 4+ years of relevant experience in the verification of IP cores and/or SOC verification. - Must have experience in developing HVL (System Verilog or Vera or Specman) base

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