Job Requirements BTechBEBSMS with greater than 3 years of experience Must have very good C and System VerilogUVM knowledge with prior work experience on live projects Experience in verification planning of complex SoC and developing test bench architecture Expertise in AMBA bus protocols and ARM CPU Expertise with NoC, DDR and Ethernet Experience with Cache Coherency Experience in developing functional verification environments including the components like monitors, checkers, scoreboards, assertions and coverage monitors GLS Experience Scripting knowledge \(Perlshell\) Must have good debugging and problemsolving skills Should be able to collate requirements from the customers, coordinate with offshore teams and ensure completion with quality Should be able to review and sign off on deliverables from team membersRequired Skills \: English

Job Description EducationBE/B.Tech./MS/M.Tech. Electronics or Electronics & CommunicationCore Competencies:Worked on SoC level testbench and verification environmentTestbench architecture, coding and good understanding of design issues in RTLTestbench generation, testvector creation, simulations, gate level simulationsHands on with System Verilog and Assertion based verification methodologyAtleast 4years of experience on HVL System Verilog, Vera, Specman, E, VMM, OVM, UVMShould be able to work independently and able to guide other team membersProblem solving capabilities with leadership qualitiesShould have managed a team of 10 or more engineersSimulation Tools:NCSIM/VCS/ModelSim/QuestaAdded Advantage:Knowledge of RTL coding stylesLow power verification UPF/CPF would be an added plusExperience on System C would be an added plusWorked on protocols like AMBA AHB/AXI, MIPI, PCI Express, SATA, USBsend your resume to careerstruechip.net and mention position/location in the subject. Job Func

Job Descriptionbr&gtbr&gt You will be responsible for IP subsystem level microarchitecture development and RTL coding.br&gtbr&gt Prepare blocksubsystem level timing constraints.br&gtbr&gt Integrate IPsubsystem.br&gtbr&gt Perform basic verification either in IP Verification environment or FPGA.br&gtbr&gtDesired Skills and Experiencebr&gtbr&gt B. Tech. or M. Tech. with 4 to 8 years of experience.br&gtbr&gt Experience in Logic design microarchitecture RTL coding is a must.br&gtbr&gt Expertise in Verilog is a must.br&gtbr&gt Should have knowledge of AMBA protocols AXI, AHB, APB.br&gtbr&gt Experience in Synthesis Understanding of timing concepts for ASIC or experience in Xilinx FPGA Design Implementation is required.br&gtbr&gt Experience in design of DDR USB PCIe controller or such complex protocols is a plus.br&gtbr&gt Hands on experience in Multi Clock designs, Asynchronous interface is a must

Experienced in ASIC RTL design Experience in managing & leading design teams for over 5 years Proven hands-on experience with SOC Design and IPs design Knowledge and experience with complex SoC designs based on ARM/ARC and hierarchical interconnect. Expertise in verilog and system verilog based logic design Create detailed micro architecture & implement complex IP or sub-system Work with DV team to debug and meet code coverage metrics Work with FW team and provide required support on FW development Experience in all design tools/standards/simulators like Lint, CDC, DC, VCS & UPF Knowledge of interconnect protocols like AMBA is a must Work with FW team and provide required support on FW development BS / MS in Electrical Engineering or equivalent. Work Experience 12 years Added Qualifications Candidate should have experience to handle and guide teams on End-to-End SOC development cycle like Design, Verification, DFT, Physical design, FPA prototyping, FW bring up, Characterization, Test

Job Description OakNorth is the next-generation credit and monitoring platform that provides banks and lending institutions with the insight and foresight needed to create a better borrowing experience for the Missing Middle the growth business who are the backbones of communities and economies globally but who have been in bankings blind spot for decades. The business was founded in 2015 by Rishi Khosla and Joel Perlman, who previously co-founded Copal Amba and grew it to 3,000 employees over 12 years, before selling it to Moodys (NYSE: MCO) in 2014, returning 125 times capital to seed investors. Since its inception, OakNorth has secured over $1bn from several investors, including: Clermont Group, Coltrane, EDBI of Singapore, GIC, Indiabulls, NIBC, Toscafund, and SoftBanks Vision Fund. The Platform has been deployed at various banks across North America, Europe, and Asia, and in the UK where OakNorth lends off of its own balance sheet via OakNorth Bank. The platform has helped OakNort

Job Requirements:- BTech/BE/BS/MS with greater than 3 years of experience- Must have very good C and System Verilog/UVM knowledge with prior work experience on live projects- Experience in verification planning of complex SoC and developing test bench architecture- Expertise in AMBA bus protocols and ARM CPU- Expertise with NoC, DDR and Ethernet- Experience with Cache Coherency- Experience in developing functional verification environments including the components like monitors, checkers, scoreboards, assertions and coverage monitors- GLS Experience- Scripting knowledge (Perl/shell)- Must have good debugging and problem-solving skills- Should be able to collate requirements from the customers, co-ordinate with offshore teams and ensure completion with quality- Should be able to review and sign off on deliverables from team members (ref:hirist.com)

Microns vision is to transform how the world uses information to enrich life for all. Join an inclusive team focused on one thing using our expertise in the relentless pursuit of innovation for customers and partners. The solutions we create help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. Req. ID 243462 Job Description Hands-on experience in RTL design(Verilog), verification, SoC design/integration flow and design automation. Strong coding skills in Perl, tcl or other industrial standard scripting languages. Strong knowledge about Pipelining, SoC reset and clock handling. UPF and low power flow Strong knowledge about ASIC tool like DC, PrimeTime, CDC/RDC and LINT. Understanding timing, synthesis, DFT and power analysis using PTPX is big plus. Familiar with SoC fabric like AMBA

Job Description must have Very Good System Verilog/uvm Knowledge with Prior Work Experience On Live Projects expertise in Amba Bus Protocols and Arm Cpu experience in Developing Functional Verification Environments Including the Components like Monitors, Checkers, Scoreboards And assertions experience in Verification Methodologies Using Random Stimulus Along with Functional Coverage scripting Knowledge (perl/shell) must have Good Debugging and Problem Solving Skills good Communication Skills and Ability & Desire to Work as a Team Player are a Must must Be a Highly Motivated and Independent Contributor with Good Aptitude and Attitude senior Verification Engineer (above 5 Years of Experience) with Pcie Expertise must have Expertise in Pci Express And/or Ethernet Bus Protocols

Conduct physical site surveys using a variety of equipment and tools - Prepare sketches/notes and perform electronic data collection including photos on mobile phone for data management - Verify the accuracy of survey data, including measurements and calculations conducted at survey site - Adhere to all COVID19 safety requirements and Electrical PPE regulations as per HSE standards - Surveyor shall visit the Public Lights poles across the given area and do the assessment using a Mobile App or tablet for the light pole survey work - 100% Field job - ITI/Diploma in Electrical is must - Freshers can apply - Walkin on 05.02.2021/06.02.2021/07.02.2021 at 16/34, V.E.S Convent School Road Garvebhavipalya Bangalore 560068 Land Mark- Amba Bajaj Showroom Job Type: Full-time Salary: ₹12,000.00 - ₹14,000.00 per month Schedule: - Morning shift The original job offer can be found in Kit Job: www.kitjob.in/job/21065330/l607-surveyor-bangalore-rural/

Job Description Technical Focus Areas Good understanding of Multi-processor and cache designs Hands on coding experience in Verilog/VHDL Familiarity with various ARM AMBA protocols (e.g AXI, AHB etc) as well as cache coherency protocols Has good knowledge on various tools viz Spyglass, 0-in,LEC etc Working knowledge of timing closure is a plus Expertise in Perl, TCL language is a plus Job Function: IT Hardware:Hardware Products & ServicesIndustry:IT-Hardware/Networking, TelecomSpecialization:Hardware Design Qualification: Any GraduateEmployment Type: Full Time

Conduct physical site surveys using a variety of equipment and tools - Prepare sketches/notes and perform electronic data collection including photos on mobile phone for data management - Verify the accuracy of survey data, including measurements and calculations conducted at survey site - Adhere to all COVID19 safety requirements and Electrical PPE regulations as per HSE standards - Surveyor shall visit the Public Lights poles across the given area and do the assessment using a Mobile App or tablet for the light pole survey work - 100% Field job - ITI/Diploma in Electrical is must - Freshers can apply - Walkin on 05.02.2021/06.02.2021/07.02.2021 at 16/34, V.E.S Convent School Road Garvebhavipalya Bangalore 560068 Land Mark- Amba Bajaj Showroom Job Type: Full-time Salary: ₹12,000.00 - ₹14,000.00 per month Schedule: - Morning shift The original job offer can be found in Kit Job: www.kitjob.in/job/21063307/l273-surveyor-bangalore-rural/

Risk Analytics Gurugram ONGPL Risk Analytics Full timeOakNorth is the next-generation credit and monitoring platform that provides banks and lending institutions with the insight and foresight needed to create a better borrowing experience for the Missing Middle the growth business who are the backbones of communities and economies globally but who have been in bankings blind spot for decades The business was founded in 2015 by Rishi Khosla and Joel Perlman who previously co-founded Copal Amba and grew it to 3 000 employees over 12 years before selling it to Moodys NYSE MCO in 2014 returning 125… Show moreShow less The original job offer can be found in Kit Job: www.kitjob.in/job/21042497/mpc699-risk-analytics-bangalore-rural/

SkillSet: uvm, department of transportation, verification, passenger, brt. General Summary: Verification engineer having expertise with sub-system and IP Verification. Hands on with UVM and System Verilog. Knowlege of AMBA bus protocols like AHB, AXI, CHI are added advantage. Exposure to industry standard protocols/buses/memory interfaces is also preferred.

Risk Analytics Gurugram ONGPL Risk Analytics Full timeOakNorth is the next-generation credit and monitoring platform that provides banks and lending institutions with the insight and foresight needed to create a better borrowing experience for the Missing Middle the growth business who are the backbones of communities and economies globally but who have been in bankings blind spot for decades The business was founded in 2015 by Rishi Khosla and Joel Perlman who previously co-founded Copal Amba and grew it to 3 000 employees over 12 years before selling it to Moodys NYSE MCO in 2014 returning 125… Show moreShow less The original job offer can be found in Kit Job: www.kitjob.in/job/21042497/mpc699-risk-analytics-bangalore-rural/

Roles and Responsibilities You will be responsible for IP / sub-system level micro-architecture development and RTL coding. Prepare block/sub-system level timing constraints. Integrate IP/sub-system. Perform basic verification either in IP Verification environment or FPGA. Desired Candidate Profile B. Tech. or M. Tech. with 3 to 8 years of experience. Experience in Logic design / micro-architecture / RTL coding is a must. Expertise in Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB. Experience in Synthesis / Understanding of timing concepts for ASIC is required. Experience in design of DDR / USB / PCIe controller or such complex protocols is a plus. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience on tools utilized in all phases of ASIC development such as Lint, CDC, Simulation etc. is required. Knowledge of low power concepts and experience is a plus The original job offer can be found in Kit Job: www.kitjob.in

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